| PART |
Description |
Maker |
| K4D623238B-GQC |
512K x 32Bit x 4 Banks Double Data Rate Synchronous RAM wi Extended Data Out Data Sheet
|
Samsung Electronic
|
| M13L2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| R2705E |
27.195MHz FSK Radio Data Receiver for Manchester Data Format
|
List of Unclassifed Manufacturers
|
| K4E661612EK4E641612E |
4M x 16bit CMOS Dynamic RAM with Extended Data Out Data Sheet
|
Samsung Electronic
|
| RC336DPEL RCV336DPEL RCV336DPELSP RCV336DPFL |
V.34 Data V.17 Fax, AudioSpan, Voice, Speakerphone, Modem Data Pump
|
ETC
|
| M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| AD1801JST |
1400 kbps DATA, MODEM-DATA/FAX/VOICE, PQFP128 TQFP-128
|
Analog Devices, Inc.
|
| SH713609 SH7137 |
SCI Clock Synchronous Simultaneous Transmit and Receive of Serial Data and DTC Data Transfer
|
Renesas Electronics Corporation
|
| W9412G6JH W9412G6JH-5 |
2M ?4 BANKS ?16 BITS DDR SDRAM
Double Data Rate architecture; two data transfers per clock cycle
|
Winbond
|
| MC68HC908JB12 MC68HC908JB12DW MC68HC908JB12JDW MC6 |
Addendum to MC68HC908JB16 Technical Data
This section updates data sheet information and introduces the 20-pin SOIC
|
FREESCALE[Freescale Semiconductor, Inc]
|
| W972GG6JB W972GG6JB-25 |
16M ?8 BANKS ?16 BIT DDR2 SDRAM
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
